ANKASYS Verilog-2D

Anka Microelectronic Systems offers design trainings, which covers everything you need to get you started with advanced design techniques.

The ANKASYS Verilog-2D is a Verilog for Design and Verification training, which covers the Verilog language constructs both for design and verification.

The training introduces first the design features of the Verilog language then it gives practical examples about how to build up a Verilog-based testbench around it.

Day 1

• Introduction to Verilog language and its history up to the latest SystemVerilog standard
• Verilog-VHDL comparison
• Continuous and procedural statements
• Data types and their usage
• Blocking and non-blocking assignments

Day 2

• User/System Tasks and functions
• File I/O and PLI
• Combinatorial and sequential logic design
• Synthesis and synthesizable RTL coding styles
• User Defined Primitives (UDP)
• Timing delays and timing checks
• Building a Verilog testbench